Market’s First CTSD ADC Delivers 50 Msamples/s January 28, 2008
Entering the PowerWise energy-efficient analog-to-digital converter (ADC) family, the ADC12EU050 is reportedly the industry’s first high-speed, continuous-time sigma-delta (CTSD) ADC. An eight-channel, 12-bit 50-Msamples/samples per second device, it offers an alias-free sample bandwidth up to 25 MHz while consuming 30% less power than pipeline devices. Some of the advantages the CTSD architecture offers over pipeline ADCs includes lower power dissipation, a low-pass, brick wall anti-aliasing filter that blocks out-of-band signals from aliasing down in-band, a purely resistive input stage that does not require a sample-and-hold amplifier, a PLL and VCO that performs clock conditioning, and instant-overload recovery circuitry that recovers from saturation within one clock cycle if the input exceeds pre-set limits. Specifications include a SINAD of 68 dB, SNR of 70 dB full scale, operation from a 1.2V supply, power consumption of 44 mW per channel at 50 Msamples/s for a total power consumption of 350 mW, and an operating temperature range from -40°C to +85°C. Available in production quantities by the third quarter in a 68-pin, 10 mm x 10 mm LLP, price for the ADC12EU050 is $64 each/1,000. NATIONAL SEMICONDUCTOR CORP., Santa Clara, CA. (800) 272-9959.
