FPGA Families Address Cost Concerns September 2004 Issue Published Date: September 24, 2004
While providing optimal feature sets, the ECP-DSP and EC FPGA families boast of being the lowest cost devices in their field. The ECP-DSP devices rely on the company's sysDSP blocks for implementing multiply, accumulate, summation, and pipelining functions. Each block can be programmed for one 36 x 36, four 18 x 18, or eight 9 x 9 multipliers. They accommodate DSP functions up to 10,000 MMAC/s and are available in densities between 6K and 41K LUTs with I/O counts from 97 to 576. Designed for high-volume applications, the EC FPGAs strike a balance between required features and cost. They are available in a range of densities between 1.5K and 41K LUTs and I/O counts from 67 to 576. Both families come in a variety of package types. In terms of support, ispLEVER version 4.1 software provides access to all of the company's digital devices plus synthesis support from Mentor Graphics and Synplicity. Prices for a 20K LUT ECP-DSP20 and EC20 are $59 and $49 each/1,000, respectively. LATTICE SEMICONDUCTOR CORP., Hillsboro, OR. (503) 268-8000.
