SoC Sets Integration Benchmarks September 2004 Issue Published Date: September 22, 2004
The RM9150 SoC relies on a proprietary interconnect system, the company's Fast Device Bus, to claim an unprecedented level of feature integration. The interconnect supports an extensive set of peripherals that includes a 200-MHz, 64-bit DDR SDRAM controller, 600 MHz HyperTransport interface, two Gigabit Ethernet MACs, and dual PCI interfaces. The device employs an E9000 64-bit MIPS microprocessor core that scales operating frequencies from 600 MHz to 1 GHz and supports 256 KB of low-latency L2 cache. Other features include a four-channel DMA controller, local-bus, DUART, 32 KB of scratch memory, and 64 GPIO pins. Fabricated on a 130 nm CMOS process and available in an 896-pin, flip-chip BGA, volume pricing for a 600-MHz device is $85. PMC-SIERRA INC., Santa Clara, CA. (408) 239-8000.
