Review

On the microprocessor front, this year saw major developments in processor performance, integration and power consumption. Performance was enhanced not only by raw speed, but also by a move to 64-bit architecture and 90-nm CMOS technology. As far as integration goes, the 64-bit VR7701 (a MIPS-based processor) from NEC Electronics America (necelam.com) is a good example of developments this year. This MPU integrates an additional 256 KB of L2 cache, a DDR SDRAM controller, a PCI-X 1.1 bus interface with a 133-MHz clock frequency, and two 10/100 Ethernet media access controllers. As far as microprocessor power consumption goes, one of this year's highlights was the introduction of the Efficeon TM8000 from Transmeta (transmeta.com). This new processor was designed to excel at "energy efficient computing," particularly in the ultra-portable notebook realm. It is expected to compete with microprocessors operating within critical thermal limits such as the 7W limit for typical fanless notebook designs.

For digital signal processors, speed was the name of the game this year. For example, Texas Instruments (ti.com) ratcheted up the speed of the new TMS320C6414/15/16 DSPs to 720 MHz. In this family, the C6414 DSP features a 64-channel enhanced direct memory access (EDMA) controller and three multi-channel buffered serial ports (McBSPs), each supporting 128 time-division multiplex (TDM) channels, as well as AC97 and IIS audio interfaces. The C6415 adds to C6414's list of features 33-MHz, 32-bit PCI and HPI circuitry for inter-processor communications, as well as support for 50-MHz Utopia Level II ATM connectivity. The C6416, the third and most highly integrated member, also features on-chip Viterbi and Turbo coprocessors.

Of course, DSP power dissipation is always a concern. A noteworthy example of power and performance was the 600-MHz ADSP-BF533 Blackfin processor from Analog Devices (analog.com), which consumes just 280 mW, while delivering up to 1.2 GMACS. The processor also integrates a switching regulator that allows programmable control of the core voltage from 0.7V to 1.2V from a single I/O supply. It also permits fully programmable D1/VGA real-time video as well as multi-channel audio.

DSP cores made some waves this year. One of them, the mAgic from Atmel (atmel.com), was the industry's first complex domain, extended precision very long instruction word (VLIW) DSP core. It delivers up to one GFLOPS at 100 MHz and provides single-cycle execution of complex arithmetic operations, including FFT butterflies and vector2 arithmetic. The core also exhibits 40-bit precision with a 32-bit mantissa and an 8-bit exponent field. Its 100-MHz clock rate is said to reduce the need for pipelining, resulting in a higher throughput than faster DSPs. Another core, the APE2 from Cambridge Consultants Ltd. (cambridgeconsultants.com) boasted of a price/performance benchmark for low-end SoC/ASIC applications. The VLIW DSP core requires as few as 7,000 gates for a 16-bit implementation. Processors can be configured to perform 10 parallel operations per cycle, delivering 1 BOPS throughput at a 100 MHz clock rate.

It is not unusual anymore to see a DSP teamed with a microprocessor or microcontroller and pointed at specialized applications. A good example of this is the DM270, a digital media processor from Texas Instruments. The device integrates a TMS320C54x DSP, an ARM7TDMI RISC processor, and video and imaging coprocessors. Another is the 56F8300 series MCUs from Motorola SPS (motorola.com/ semiconductors), which integrate digital signal processing and fast flash memory into a 16-bit package. The chip offers both DSP and MCU instructions, while maintaining the ease of system design inherent in MCUs.

Integration also occurred with network processors (NPUs) as evidenced by the PayloadPlus APP540 from Agere Systems (agere.com). This chip integrates four separate devices: a programmable traffic manager, multi-field classifier search engine, network processor, and Ethernet media access controller (MAC).

—Joe Desposito

Outlook

Crazy Speed
Texas Instruments let the world know in mid-2003 what to expect in terms of DSP speed for 2004—1 GHz. Taking aim at real-time applications, such as artificial vision, home media centers, and streaming-media infrastructures, the new DSP will employ 90-nm process technology to achieve this level of performance. Samples of the 1 GHz DSP are expected to be available in the first half of 2004.

In addition to speed, expect integration, specialization and low-power operation to be recurring themes in the development of new microprocessors, DSPs and NPUs as process technology shifts from 90 nm to 65 nm over the next couple of years.

—JD