Review

Since the heading of this section covers somewhat diverse technologies, we'll cover each in order, beginning with memories. Some of the advances in memory technology this year were due to process geometries, mostly at 13 µm and 11 µm. For example, 256 MB DDR2 SDRAMs from Micron Technology (micron.com), validated by Intel at DDR2-400 speeds on x4 and x8 configurations and DDR2-533 speeds on x8 configurations, were manufactured on an 0.11 µm process technology. Another example is the 288 Mb Rambus DRAM (RDRAM) from Elpida Memory Inc. (elpida.com). The company's devices employ Rambus signaling level (RSL) technology to achieve data transfer rates up to 1,066 MHz (1 GHz). The chips are produced using a 0.13 µm process technology and are available in fine-pitch ball-grid array (FBGA) packages.

Other advances in memory technology came from packaging achievements. For example, M-Systems (m-sys.com) claimed the industry's smallest high-capacity NAND-based storage device. The latest member of the Mobile DiskOnChip G3 product line squeezes 1 Gb of flash memory into a footprint measuring just 9 mm x 12 mm x 1.2 mm. Similar to its 512-Mb counterpart in the line, the 1-Gb device employs x2 technology, the result of a collaboration between M-Systems and Toshiba that reportedly improves reliability and performance and reduces power consumption.

As for logic devices, one member of this group, the level translator, made gains in integration and utility. For example, the MAX3000E, MAX3001E and MAX3002 to MAX3012 bi-/uni- directional, octal logic-level translation ICs from Maxim Integrated Products (maxim-ic.com) promise to replace up to 10 discrete components and to allow ASICs with supply voltages down to 1.2V to communicate with 5.5V peripherals. Another of these devices, the FXLP34 from Fairchild Semiconductor International (fairchildsemi.com) was introduced as the industry's first single-bit, dual-voltage translator buffer. The device employs two separate supply voltages (VCC and VCC1) to translate between logic voltages within a 0.9V to 3.6V range.

In the FPGA arena, some of the progress was in hardware, some in cores, and some in software. A hardware example is the Stratix GX EP1SGX40G from Altera Corp. (altera.com). It was the industry's first FPGA with twenty 3.125-Gb/s transceiver channels. It also provides 45 channels of embedded dynamic phase alignment (DPA) that support 1-Gb/s source-synchronous communication. According to the company, incorporating the DPA feature directly in the silicon's source-synchronous channels provides a verified, reliable solution for both skew reduction and higher-speed data transmission. Another example, highlighting packaging and cost, is the Spartan-3 XC3Sxxxx family from Xilinx (xilinx.com). Introduced as the industry's lowest-cost family of FPGAs for high-volume applications, the devices provide users with 50,000 to 5-million system gates. Manufactured using a copper-based, 90-nm process, the eight-member family offers an 80% chip-size reduction compared to 130-nm technology.

FPGAs and IP cores have teamed up very well in the past few years and this year was no exception. An example comes from Actel Corp. (actel.com). Under auspices of the company's CompanionCore Alliance program, 4i2i Communications optimized its Viterbi and Reed-Solomon encoder and decoder intellectual property (IP) cores for use with the ProASIC Plus, Axcelerator, SX-A, and RTSX-S FPGAs. In addition, 4i2i optimized its JPEG encoders and decoders for the Axcelerator device family.

Finally, from a software/programming perspective, National Instruments (ni.com) extended the capabilities of the LabVIEW graphical development environment to include FPGAs. The LabVIEW FPGA Pioneer System allows users to create custom applications that run on the company's FPGA-based, reconfigurable I/O hardware. The complete PXI system includes the LabVIEW FPGA module and the PXI-7831R reconfigurable I/O hardware.

—Joe Desposito

Outlook

Putting The M In Memory Chips
As this issue went to press, the big news in memory technology was the announcement by Motorola SPS (motorola.com/sps) of the 4 Mb MRAM (magnetoresistive random access memory) chip. The company says MRAM combines non-volatility with incredible endurance and speed. It has demonstrated a 256K x 16 "toggle" MRAM chip based on a 0.18 µm five-level metal CMOS process technology. This technology could make a serious impact in 2004.

As for other memory technologies, incremental changes are likely to be the order of the day, with greater capacities, faster speeds and lower power consumption at the head of the list of improvements. And the same will probably hold true for logic devices, PGAs & FPGAs—incremental improvements in the hardware throughout 2004. However, FPGAs have become a powerful tool for designers based on the availability of powerful IP cores, so it's reasonable to expect great strides in 2004 both in the development of new cores and in the way they are used for various applications.

—JD