Two-Chip Set Simplifies Design Of Cost-Sensitive TVs November 2001 Issue Published Date: November 01, 2001
Targeting the lower-cost-end of the market for televisions, the M61130FP NTSC tuner IC combines on-chip both channel selection and demodulator circuitry. Previously, a separate chip was required to implement each of these two functions, which are needed to reduce the effects of crosstalk and noise in tuners. In addition, the single-chip NTSC tuner eliminates the need for an externally-connected voltage-controlled oscillator (VCO) coil for intermediate-frequency (IF) signal processing. Manufactured using a high-frequency BiCMOS process, the M61130FP integrates on-chip UHF and VHF mixer and local oscillation circuits, a video/audio IF signal processor circuit, four-band switch driver circuits, and a 3.58-MHz or 4-MHz crystal oscillator. By combining the IC with the recently introduced Dreama 1 digital video processor chip (part No. M65580MAP-XXXFP), OEMs are said to have nearly all of the circuitry needed to operate television sets. (The CMOS video processor IC melds on-chip a color TV image signal processor and an 8-bit MCU, with Dreama 1 activated by a simple instruction in the same memory space used for the deviceÕs built-in ROM, RAM and I/O.) The M61130FP tuner chip comes housed in a 7 x 7-mm, 48-pin QFP package and is priced at $4.20 each in sample quantities. Volume production is scheduled to begin in the first quarter of 2002. The Dreama 1 video processor comes in an 80-lead QFP and costs $8.65 each in sample quantities. For more information, contact MITSUBISHI ELECTRIC & ELECTRONICS USA INC., Sunnyvale, CA. (408) 730-5900.
