ICs Meld 16-Bit µC Performance With DSP Computational Speed November 2001 Issue Published Date: November 01, 2001
Consisting of three IC families that span a broad range of applications, the dsPIC series of digital signal processors (DSPs) integrates on-chip a fully-implemented digital signal processor engine and a familiar, 16-bit microcontroller architecture to achieve 30-MIPS non-pipelined performance and a C compiler-friendly design. The initial 20 members of the dsPIC30Fxxxx series offers 12 to 144 KB of flash program memory and up to 8 KB of data memory and a 2.5V to 5.5V operating voltage range. Among the features brought on-chip by the DSP engine are a 16-bit x 16-bit multiplier, two 40-bit (optional) saturating accumulators, a 16-bit bi-directional barrel shifter with up to a 40-bit value, and independent address generation units that enable concurrent fetches of two operands for most DSP-class instructions. The PICmicro-based µC circuitry, in turn, adds to the chip single-cycle instructions, a fault-tolerant oscillator, up to eight capture and eight compare functions for increased PWM flexibility, up to five 16-bit timers, a watchdog timer, up to 68 I/O bi-directional ports, and a variety of communications capabilities and analog circuitry (12-bit A/D converters, programmable brownout detect, etc.). The dsPIC30Fxxxx series includes the 28- to 80-pin motor control and power conversion family, the 18- to 28-pin sensor processor family, and the 64- to 80-pin general-purpose family. Prices range from $4 to $14 each/5K, with beta sampling of the first devices planned for the first quarter of 2002, general sampling and hardware development tool availability set for the third quarter, and volume production scheduled for the fourth quarter. MICROCHIP TECHNOLOGY INC., Chandler, AZ. (480) 792-7668.
