Products Provide System-Level Verification Of Complex Circuits July 2000 Issue Published Date: July 01, 2000
Two new systems-- one an in-circuit emulation system, the other a prototyping system-- have been developed for system-level verification of system-on-a-chip (SOC) devices and complex systems. Called MercuryPlus, the ICE system is based on a new FPGA optimized for emulation and is said to achieve record-breaking compile times, debug productivity, and circuit modeling accuracy. The prototyping system, called the Rapid Prototyping System (RPS), is used to verify IP-centric, platform-based designs. It complements MercuryPlus by allowing system prototypes to be built quickly using IP core building blocks. The custom FPGA-based MercuryPlus is said to employ a highly scalable architecture that incorporates special on-board debugging logic and delivers higher speed, predictable interconnection routing compared to commercial FPGAs. With this ICE system, million gate designs can be compiled in less than one hour; and it can support designs having up to 20 million ASIC gates. Its price starts at $595,000. The new RPS is a re-configurable prototyping system that leverages two technological trends: the availability of high-density FPGAs and physical, bonded-out IP cores; and the evolution of SOC designs to on-chip, bus-based architectures. RPS's architecture is optimized to take advantage of both trends. The system is available in various hardware/software configurations.
