80C51 Architecture Breaks 64 KB Barrier April 2000 Issue Published Date: April 01, 2000
With the introduction of the 80C51MX Memory eXtension microcontroller, the 80C51 architecture can support more than 64KB of program and data memory. Although it has the ability to address up to 16MB of internal and external memory, initial pin-compatible OTP and Flash devices will feature 64KB to 256KB of memory. The device retains full object-code compatibility with its predecessor, allowing engineers to re-use existing 80C51-based source code. Also retained is the bus compatibility so 80C51-based peripherals and ASICs can be used. A set of software tools to support the architecture is available from Keil Software.
